Guidelines for Component Placement in Professional Boards

Written by Rush PCB Inc on . Posted in PCB, PCB Assembly and component

PCB design is a complex process typically requiring several considerations, sometimes with no single correct way of achieving a functional outcome. Engineers need an in-depth understanding of the printed circuit board (PCB) design process along with the knowledge of pros and cons of various options available to them for making the best design choice for achieving an optimum balance between functionality, usability, durability, and inevitably, within budget constraints.

Major Considerations

Professionals have several considerations to weigh while placing components on the printed circuit board (PCB). Major considerations include:

  • Thermal Management
  • Function of the Component
  • Susceptibility to Electrical Noise

Once the designer has outlined interconnect and major component positions, it is usual for them to place individual components and go through several cycles of analysis while adjusting for improving the routing and optimizing the performance. At this point, they may also find it necessary to reconsider placement of components including changes in package sizes based on cost and sizing concerns. Experienced designers usually place components in a specific order such as:

  • Mechanical Inserts and Connectors
  • Supply and Power related Components
  • Precision and Sensitive Circuit Components
  • Critical Circuit Components
  • Other remaining Components

Best Practices for Placement and Routing

Although the design process may vary from design to design, designers follow some best practices for component placement. Some of them are:

  • Orienting all similar components in the same direction for easier diagnosis and traceability. For instance, placing all polarized diodes, capacitors, LEDs with their cathodes either to the +X or +Y direction. Placing such information on silk screens or in the copper layer is helpful to manual assembly, reducing human error.
  • Placing all Surface Mount Type (SMT) and Through Hole (TH) components on the same side of the board. This reduces the number of assembly steps.
  • Following the Design for Manufacturing (DFM) guidelines of their organization. Proper structure of traces and pads can prevent skewed or tombstoned components.

After the designer has finished placing components, they will route the power, ground, and signal traces, in that order. Optimizing the routing is necessary to obtain a clean and clear travel path for the traces free of obstacles and interference. Designers prioritize routing based on power levels, susceptibility to noise, while considering manufacturing capabilities. Designers also follow routing best practices, some of which are listed below:

  • Making symmetrical and centered power and ground planes, positioning them on the interior or the exterior of the board, depending on signal integrity and EMI/EMC requirements.
  • Shielding sensitive signals from noise sources using power and ground planes
  • Avoiding daisy-chaining parts related to power circuits
  • Considering thermal and electrical consequences for components absorbing more than 10 mW or conducting 10 mA, especially for small SMT components.
  • Allowing power components to dissipate heat through either ground or power planes
  • Considering accepted voltage drops for high-current connections
  • Allowing two to four vias for each high-current layer when transitioning. Multiple vias during layer transition usually provide benefits of improved thermal conductivity and reliability. Multiple vias also reduce resistive and inductive losses.
  • Using short and direct traces between components, placing signal traces according to schematic guidelines.

Thumb Rules for Heat Management

Designers pay special attention to thermal management, as improper heat management will often degrade and damage a PCB. They usually consult the ratings for thermal resistance for a component, thereby determining the components likely to dissipate the most heat. They will typically place critical and sensitive components at adequate distances from high heat generation components.

Designers use various techniques to handle thermal management. For instance, they will use thermal reliefs for TH components, and thermal relief patterns for holes and vias associated with ground or power planes. For reducing thermal and mechanical stress on pads and traces, designers add teardrops as added metal/copper support.

Proper design of pads also helps avoid tombstoning by ensuring consistent thermal loads. Unequal size of pads for a two-terminal SMT component may cause one side of the component to reflow faster than the other does. The greater force of reflowing solder on that side of the component causes the other end to move upwards, with the result the component ends up standing on one end, resembling a tombstone.

pcb guidline

Trace Design for Solder Flow Control

The solder mask designers place on the board exposes only the solderable parts of the copper traces. Without the solder mask, molten solder will flow down the trace covering as much as it possibly can cover. As the printer allows only a limited quantity of solder paste on each pad, in the event of solder flowing down the trace, not much of it may be available to anchor an SMT component properly to the pad. Additionally, the flowing molten solder may pull the component off the pad and skew their position. In fact, the force may be large enough to twist the component so much the other end comes off its pad altogether.

Designers counter this by careful design of traces leaving the pad. Typically, they allow the traces to leave the pads either directly inwards or outwards. The pulling forces of the molten solder then act in opposite directions, thereby canceling each other. In case it is not possible to make the traces leave the pad in the inward or outward directions, designers tend to have them leave the pad in the same direction. This allows the pull on the component to also be in the same direction, making it less likely for the component to face a torque-like situation that can pull one end off a pad.

Thieving Pads help Reduce Bridging in Wave Soldering

It is customary for designers to place high pin count devices such that the row of pins is perpendicular to the flow of the solder wave. That means all the pins enter the molten solder at the same time and all of them leave the molten solder at the same time, reducing the chances of bridging. However, such placement is not always possible, and in parallel positioning, the leads enter the solder one at a time, and this pulls the wave from one lead to the next, increasing the chances of bridging between neighboring leads, especially the last two of them.

Making the last pad somewhat larger than the others are, helps to wick the excess solder off the last lead, pulling it away from its neighboring lead, and reducing the chances of solder bridging between the two. To make this scheme successful, however, the designer must consult his/her assembly partner as to the efficacy of the thieving pad.

Also Read: Flex PCBs and the Internet of Things (IOT)

Design for Manufacturing

With increasing automation in the PCB industry, it is essential engineers and designers follow DFM rules for component placement. This also requires the board to have at least two parallel edges for the machines to grip the board properly during assembly. For irregular board shapes, fabricators leave the board connected to the rectangular panel. To reduce assembly time when assembling small boards, fabricators may have multiple boards in one panel, with perforations or V-grooves in between to help separate them after the assembly is over.

This requires designers to be careful to not place components in the areas where the machine will grip the board, and near the perforations or V-grooves where the boards will break apart.

Using automated tools for component placement such as pick-and-place machines requires the operator to program the machine with some reference point on the PCB. These references usually take the form of tooling holes in extreme ends of the PCB in the X and Y directions, along with a hole near the origin.

Designers include the tooling holes when they begin their design, and it appears on all the Gerber files, thereby allowing the fabricator to properly align all the layers when fabricating the PCB. Designers need to be careful to not place any component within a certain radius of the tooling holes.

The tooling holes also help the fabricator to stack PCBs atop each other while drilling them. The pick-and-place machine uses the tooling holes as mounting holes for referencing all component placements. The same holes also act as a guide for aligning the stencil during application of solder paste. Tooling holes also assist during electrical testing of assembled PCBs, and may even double as the mounting holes when the PCB is placed in the product enclosure. Designers must discuss with their assembly partners regarding the optimum positioning of the tooling holes.

Another PCB feature that assemblers often need is the fiducial mark, especially for mounting large ICs with fine-pitch pins such as BGA packages. The pick-and-place machines take reference from the fiducial marks to position the IC accurately on the board.

Designers usually place two fiducial marks near the IC, essentially along one of its diagonals. They must follow the standard practice for the design of the fiducial mark. Again, there are restrictions on placement of components near to and around the fiducial mark that the designer must follow.


Proper component placements can distinguish a professional board from others. This can also be a measure for the reliability the board can deliver. Although there is no single method of placement that will work for every design every time, knowing the various tools designers use and their different methodologies helps in boosting the yield, increasing repeatability, decreasing costs, and creating an efficient design. Using the above methods can help in producing higher quality of circuit boards.

Optimizing Manufacturing Processes for Special PCBs

Written by Rush PCB Inc on . Posted in PCB Manufacturing

The increasing demand for higher functionality and smaller size requires Rush PCB to fit capabilities such as high speed or high power into small and often oddly shaped spaces. The reason may be to add new functionality or to make a choice between a module-based or a custom PCB design. Oftentimes, the challenge may lead to a better outcome or to a break-through in finding a new solution.

By selecting your contract manufacturer wisely, you can lead your board manufacturing and PCB assembly down the optimal path. However, this requires specifying the board requirements first, which again depend on the electrical, mechanical, thermal, and chemical properties of the PCB. Furthermore, manufacturing special board types can and often do impact the turnaround time and cost.

pcb manufacture process

Electrical Properties

As a contract manufacturer, Rush PCB offers a list of PCB materials. Although it may be possible to find a suitable board that meets your specific properties from the recommended list, sometimes the design may call for boards with requirements falling outside those commonly available. To inform us of the special requirements, you need to define them as specific board properties. While some of these properties relate to general safety and reliability, others define how well the board will function at high speeds or high frequencies:

General Safety & Reliability

  • Electrical Strength — measured across the z-axis of a PCB, this is the ability of a dielectric material to resist an electrical breakdown. It is common for PCBs to have an electrical strength between 800 and 1500 V/mil.
  • Volume Resistivity — this is the ability of the dielectric material of the PCB to oppose current flow through it. Highly dependent on the presence of moisture and ambient temperature change, it is usual for PCBs to have a volume resistivity of between 103 and 1010 MΩ-cm.
  • Surface Resistivity — this is the ability of the dielectric material of the PCB to oppose current flow along its surface. Presence of moisture, temperature extremes, and surface contaminants impact this ability, lowering the ability. Common values for PCB materials are between 103 and 109 MΩ/sq.

Board Function at High Speed/Frequency

  • Conductor Loss — this is the attenuation of the signal along the conductor or trace. For DC signals, conductor loss relates directly to the resistance of the trace. For AC or high frequency signals, it is dependent on the frequency of the signal.
  • Dielectric Loss — the amount of energy lost in the dielectric. Depending on the dielectric constant of the laminate and its dissipation factor, it dominates PCB performance at high frequencies. For general-purpose PCB materials, the dielectric loss is around 0.02, whereas for high-end materials it may be around 0.001. Although consequential for analog signals of high frequency, it affects digital signals with frequencies beyond 1 GHz.
  • Dissipation Factor — the amount of AC energy the dielectric absorbs from an electromagnetic field passing through the material. The parameter provides an important insight into the behavior of the PCB material when minimizing the signal distortion and preserving the signal integrity.
  • Dielectric Constant — also known as the Relative Permittivity of the laminate of the PCB, it is a critical factor for performance at high frequencies. For most PCB materials, the dielectric constant is in the range of 2.4 to 4.5. Materials suitable for applications at high frequencies need to have dielectric constants remaining relatively unchanged over a wide frequency range covering 100 MHz to several GHz.

Mechanical Properties

While Rush PCB will accommodate most common width, length, and thickness requirements of PCBs, we also cater to most of the shapes you define. However, you must define certain parameters as these can affect the functionality of your product:

  • Flexural or Bend Strength — Applicable to flex or rigid-flex boards, this is the ability of the PCB material to bend under physical stress before fracturing. It is measured in kilograms per square meter or pounds per square inch.
  • Copper Peel Strength — this defines the ability of the copper layer in the PCB to bond to the dielectric. Thermal stress at high temperatures and exposure to moisture and chemicals may affect the copper peel strength.
  • Stackup — this is the number of layers comprising your PCB. The density of the electrical circuit defines the stackup, and the number of layers may be affected by the technology you adopt, such as HDI and micro vias.
  • Time to Delamination — this is the time required for layers to separate from one another when the PCB is exposed to temperatures beyond a certain threshold. Delamination can also occur when the PCB is exposed to moisture.
  • Surface Finish — it is very important to define the surface finish as it depends on the environment in which the board will be operating. You can select from various options available.

Thermal Properties

Application of heat is essential to PCB assembly. Therefore, thermal properties of the PCB material can impact the manufacturing of boards significantly. Additionally, thermal properties are a major factor for determining the performance of a board in environments with extreme temperatures.

  • Coefficient of Thermal Expansion — the rate at which the PCB material expands or contracts with change in temperature. Unless matched, substrates can expand or contract faster than copper traces do, and this may cause problems in connectivity.
  • Thermal Conductivity — the rate at which PCB material can conduct heat. This is an important factor to consider when heat producing components are present on board.
  • Glass Transition Temperature — when exposed to a temperature above a certain threshold, the PCB material softens, but hardens back to its natural state when the heat source is removed. The temperature at which this happens is the glass transition temperature and is important for PCB baking and assembly.
  • Decomposition Temperature — beyond a certain high temperature, the PCB material will start decomposing, irreversibly losing about 5% of its overall mass. This temperature is the decomposition temperature. For reflow, the soldering temperature range is generally between 200°C and 250°C. Ideally, PCB substrates should have their glass transition temperature below this range and their decomposition temperature should be above.

Chemical Properties

During manufacturing and assembly, PCB materials are subject to several chemicals for cleaning and protection. It is necessary these chemicals not degrade the dielectric material or change its electrical and mechanical properties.

  • Flammability — Materials used in PCBs must be flame retardant, meaning these must not support combustion even if these have caught fire for some reason. The Underwriters Laboratory or UL94 specify the flame-retardant properties of plastics, ranking them from the highest to the lowest. According to UL94 standards, specimens must not burn for more than 10 seconds with flaming combustion.
  • Moisture Absorption — Most PCB materials show a moisture absorption value of between 0.01 and 0.20 percent, the amount of liquid the PCB material absorbs when submerged. The amount of moisture absorbed by the material influences its electrical and thermal properties.
  • Methyl Chloride Resistance — the PCB surface is subject to different cleaning solutions during and after assembly. Its capability to resist these chemicals is measured by testing its absorption of Methyl Chloride. It is usual for PCB dielectric materials to show a Methyl Chloride resistance between 0.01 and 0.2 percent.

Optimizing Manufacturing Processes for PCBs

Some of your special requirements will require additional turnaround time and or involve additional cost. For instance, trace widths less than 0.003 in, heavy copper weight greater than 2 oz., stackup greater than eight layers, and surface finish call for additional turnaround time along with enhanced cost.

Specifying material other than FR4 will most likely not add to turnaround time, but may involve additional cost. Likewise, size greater than 6 in x 6 in, and light copper weight less than 0.5 oz. may only involve additional cost but may not increase the turnaround time.

Depending on your requirements, selecting the best substrates and copper is essential when designing your PCB. This is because the materials we use will define the properties for all PCB types. Discussing the PCB board material selection with us will determine if we can meet your requirements. Additionally, certain best practices help in selecting the best combination of substrate material and copper, ensuring a reliable and high quality product.

Matching Dielectric Constants — it is necessary to match the dielectric constants of the different dielectrics in a PCB to avoid problems.

Matching Coefficient of Thermal Expansion — the CTE between two substrates must match to allow them to expand or contract in unison. The CTE between substrate and copper layer must also match to prevent electrical discontinuity when expanding.

Use Smooth Foils — this is especially helpful at high frequencies, as the foil smoothness helps mitigate losses at such frequencies.

Use Foils of Good Conductivity — Right conductivity can help lower heat generation and ensure proper dissipation.


PCB performance is mostly based on its quality. We ensure quality by offering high quality, well-matched constituents. Substrates of good quality do not come cheap, and if you are willing to invest properly, you stand to gain far more down the line for the good quality of your product.

HDI Layer Stackup Design for Large Dense PCBs

Written by Rush PCB Inc on . Posted in PCB, PCB Design, PCB Manufacturing

Initial design work for large, dense Printed Circuit Boards (PCBs), especially the High Density Interconnect (HDI) types, requires the designer to define the appropriate stackup. HDI PCBs that use multiple large and dense Ball Grid Arrays (BGAs) benefit from a proper focus on PCB stackup design, as this enables the creation of an effective board.

It is necessary to consult your vendor during the design of the HDI layer stackup, as this helps to minimize the cost and to meet requirements of signal integrity. During fabrication processes, the vendor has to adjust the stackup variables to meet your goals for cost, reliability, overall thickness, and impedance controls. When you and the vendor both agree to an HDI layer stackup prior to designing the board, the fabricator will need to make only minimal adjustments to comply with your requirements. Unless you define the initial stackup in consultation with the vendor, the fabricator may not be able to fulfill your overall requirements with minor acceptable adjustments.

Stackup Design Affects Signal Integrity

As stackup design affects signal integrity, designers must consider PCB stackup design as one of the most important aspects of their initial design activity. The main reason is fabrication processes for PCBs are not exact enough to match the material choices, trace widths, dielectric, and copper thicknesses you may have carefully defined. Moreover, vendors usually have different equipment and methods.

Fig. 1: Example of PCB Stackup with Different Vias

Fig. 1: Example of PCB Stackup with Different Vias

The fabricator may have to change the materials if they are not readily available or in stock. A reliable vendor would need to make the proper combination and in-process adjustments so that tolerances that add up in all areas work towards fulfilling your specifications, especially when measuring impedances on the test coupon. To fulfill your impedance requirements, your vendor may have to make small changes to the material thickness and trace widths.

Preference for HDI Layer Stackup

For boards with several high pin-count BGAs, you could have PCBs using standard lamination with through vias, sequential lamination with blind and buried vias, or a PCB stackup with micro-vias. Although the first type offers several advantages such as low cost, simple via models, and high reliability with a familiar and mature fabrication process, it is unfortunately limited to a low layer count. The simpler fabrication process also tends to make vias large in diameter, reducing the routing ability, and forcing the designer to increase the number of layers.

The second type of stackup using sequential lamination with blind and buried vias, generally has simple vias with a lower aspect ratio, allowing smaller hole sizes. Although this improves the routing ability, the process still does not allow reducing trace widths, resulting in only a few fabricators adopting the process, the most preferring the HDI PCB process instead.

The third type of stackup using micro-vias is the HDI PCB technology, where fabricators use laser beams to form very small diameter vias also known as micro-vias. As a result, this technology also allows very small features for both vias and traces, enabling very high routing density and fewer layers. Designers can stack or stagger micro-vias and apart from opening up routing channels, this is the only practical way so far available for designing with multiple large BGAs of 0.8 mm or lower pitch.

Fig. 2: HDI Stackup IPC Type III

Fig. 2: HDI Stackup IPC Type III

Appropriate PCB stackup design with HDI technology not only improves signal and power integrity, it provides the lowest cost for high-density boards. Materials used in HDI technology ate more suitable for use in processes requiring lead-free soldering and RoHS.

At present, most handheld and consumer electronics manufacturers prefer the HDI technology, as this gives the best alternative to high layer-count sequentially laminated or expensive standard laminate boards. This is especially true as the trend is more towards finer pitch and higher pin-count components such as BGAs, LQFPs, and CSPs.

The Institute of Printed Circuits (IPC) in collaboration with the Japan Printed Circuits Association provides standards such as IPC/JPCA-2315, which offer easy tutorials on HDI and micro-via design rules and their structures. It also offers advice on selection of materials, considerations when designing an High Density Interconnect PCB, while providing design examples and processes for various micro-via technologies.

Also ReadDifferent Stackups for HDI PCBs

Stackup Design Standard

HDI PCB stackup design may follow six types as the IPC-2315 standard specifies. Of these types IV, V, and VI are of the expensive type for fabrication, and not suitable for large dense PCBs.

HDI PCB stackup design IPC Types I and II use a laminated core, micro-vias, buried vias, and through vias. However, as they use a single micro-via layer on at least one side, it makes these types unsuitable for fabricating large, dense boards.

HDI PCB stackup design IPC Type III

Since HDI PCB stackup design IPC Type III allows use of two or more micro-via layers on at least one side of the board, this is the most suitable for large, dense boards with multiple high pin-count BGAs. In an IPC Type III stackup, fabricators can drill via holes in the laminated core, and the via become buried as they add dielectric material for the micro-via layers. Designers may stagger or stack micro-vias in relation to themselves and other buried vias in the PCB.

In the IPC Type III PCB stackup design, designers can use the outer layers as GND planes, thereby improving EMI/EMC requirements. In such cases, designers can use the inner layers for placing Power planes and micro-vias for signal routing. While this may not be feasible in a 4-layer PCB stackup design, the strategy works very well for 8-layer PCB stackup, 10-layer PCB stackup, 12-layer PCB stackup, and higher.

The designer decides on the number of cores and the buildup layers actually required for a specific board. The final PCB stackup design depends on the designer’s management of the plane layers, routing density, and signal integrity requirements.

For instance, the designer may improve routing density by removing all unused pads on buried vias. This also reduces crosstalk significantly. Similarly, keeping via aspect ratios to 5:1 for micro-vias, 10:1 for buried vias, and micro-via pad sizes to about 0.15 mm larger than the hole, helps to improve the routing density largely.

While stacking vias offers the most flexibility and efficiency to a designer for routing a multi-layer board, it is a more expensive process compared to the process of using staggered vias. Moreover, if the designer has used buried vias, he/she can easily extend the buried via into the first micro-via layer, as this will take up less space, for say, extending ground and power nets all the way through the board. However, the fabricator may charge more for extending buried-vias rather than having them in the laminated core alone.

Improving Routing Ability in HDI PCB IPC Type III

Designers use several techniques for improving routing ability in their boards to reduce the number of layers effectively. As large dense boards often use fine-pitch BGAs, the location of vias with respect to the BGA pads assumes greater significance for improving the routing ability. For instance, designers may place vias adjacent to the BGA pads, causing dog-bone type structures. For even greater density, designers may prefer to use via-in-pad design, offset via-in-pad design, or partial via-in-pad design, of which, the first offers the greatest opportunity for increasing the routing density. Ultimately, improving the routing density reduces the layer count and hence, the overall fabrication costs.

Also Read:  Why You Need an HDI PCB?

Improving Power Integrity in HDI PCB IPC Type III

HDI stackup in IPC Type III boards affects the power and signal integrity depending on how the designer locates the power and ground planes. For instance, a designer may decide to assign the GND plane to the outermost layers, as this provides an excellent EMI shield. Additionally, the designer may assign GND to the outermost layers and VCC to the adjacent layers.

Fig. 3: Power and Signal Integrity in HDI PCB Type III

Apart from the advantages of an EMI shield, this strategy improves the capacity coupling between the GND and Power layers, resulting in minimizing bypass capacitors a BGA needs. This strategy also allows an opportunity to the designer for using embedded pull-up resistors and bypass capacitors, while opening up additional routing space on all signal layers. Moreover, stripline configurations with pairs of signal layers sandwiched between plane layers reduce crosstalk drastically, while providing the best return paths.

Designers can use split planes or even dedicated voltage layers for distributing powers to large BGA requiring multiple voltage supplies. They can improve the power integrity by placing a couple of voltage supply layers near the center of the board, and surround it with GND planes. This way, designers can avoid the splits or different voltages affecting signal layers that cross them.


The best HDI layer stackup design depends on the priorities of the designer. It is best to analyze each stackup for relative cost, routing density, power density, signal integrity, and power integrity. Large dense PCBs benefit from HDI stackup using IPC Type III PCB stackup design, where the outermost layers are the GND and Power layers, with micro-vias in at least two inner layers on at least one side for maximizing routing density,